ADT7476A
http://onsemi.com
11
Figure 20. Reading Data from a Previously Selected Register
0
SCL
SDA
1
0
1
1
A1 A0
D7
D6
D5 D4 D3 D2 D1 D0
NO ACK. BY
MASTER
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADT7476A
1
1
9
ACK. BY
ADT7476A
9
R/W
Write Operations
The SMBus specification defines several protocols for
different types of read and write operations. The ones used
in the ADT7476A are discussed below. The following
abbreviations are used in the diagrams:
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> S START
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> P STOP
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> R READ
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> W
WRITE
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> A ACKNOWLEDGE
?SPAN class="pst ADT7476AARQZ-R_2298076_4"> A
NO ACKNOWLEDGE
The ADT7476A uses the following SMBus write protocols.
Send Byte
In this operation, the master device sends a single
command byte to a slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA, and
the transaction ends.
For the ADT7476A, the send byte protocol is used to write
a register address to RAM for a subsequent single-byte read
from the same address. This operation is illustrated in
Figure 21.
Figure 21. Setting a Register Address for
Subsequent Read
SLAVE
ADDRESS
W A
S
A P
REGISTER
ADDRESS
2
3
1
5 6
4
If the master is required to read data from the register
immediately after setting up the address, it can assert a repeat
start condition immediately after the final ACK and carry
out a single byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte
and one data byte to the slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA,
and the transaction ends.
This operation is illustrated in Figure 22.
Figure 22. Single-byte Write to a Register
SLAVE
ADDRESS
W A
DATA
S
A
A P
REGISTER
ADDRESS
2
3
1
5
6
7 8
4
Read Operations
The ADT7476A uses the following SMBus read
protocols.
Receive Byte
This operation is useful when repeatedly reading a single
register. The register address is set up beforehand. In this
operation, the master device receives a single byte from a
slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the read bit (high).
3. The addressed slave device asserts ACK on SDA.
4. The master receives a data byte.
5. The master asserts NO ACK on SDA.
6. The master asserts a stop condition on SDA, and
the transaction ends.
In the ADT7476A, the receive byte protocol is used to
read a single byte of data from a register whose address has
previously been set by a send byte or write byte operation.
This operation is illustrated in Figure 23.
Figure 23. Single-byte Read from a Register
SLAVE
ADDRESS
DATA
A
R
S
A P
2
4
3
1
5 6
Alert Response Address
Alert response address (ARA) is a feature of SMBus
devices, allowing an interrupting device to identify itself to
the host when multiple devices exist on the same bus.
The SMBALERT
output can be used as either an interrupt
output or an SMBALERT
. One or more outputs can be
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